工艺整合工程师 PIE Engineer

1. Cooperate with foundry to improve product yield & reliability;

2. Cooperate with foundry to setup & optimize design rule & device target;

3. DRAM Cell characteristic & Peri Transistor optimization

4. WAT parameter trend management

5. Cooperate with test team for Yield/Reliability analysis & improvement

6. Cooperate with test team for fail mechanism analysis and Improvement

Job Requirements:

1, Full CMOS process understanding

2. Understanding of DRAM Cell process integration

3. Understanding of WAT parameter

4. Understanding of Reliability parameters

5. Problem identification and troubleshooting

6. Good communication with co-related person

7. Self-motivated and able to work independently

8. Good communication in English

工作职责：

1. 与FBA厂合作，提高产品良率和可靠性;

2. 与FAB厂合作，建立和优化设计规则和设备目标。

3.DRAM CELL特性及周期晶体管优化

4. WAT参数趋势管理

5.与测试团队合作进行良率/可靠性分析和改进

6.与测试团队合作进行故障机制分析和改进

任职要求：

1. 完整的CMOS工艺理解

2. 了解ETOX NOR工艺集成

3. 了解WAT参数(特别是NOR ETOX Cell Array)

4. 对可靠性参数的理解

5. 问题识别和故障排除

6. 与相关人员进行良好的沟通

7. 自我激励，能够独立工作

8. 良好的英语沟通能力