Digital Backend Design Engineer(J11206)

1.To demonstrate ability and to be hands-on in RTL-to-GDSII densign methodology, including both challenging low power an high-performance designs.

2.Have design experirence including floorplan&powerplan,CTS,route,timing sign-off and power sign-off.

3. physical verification.

任职资格:

1.Familiar with physical design flow/tools(Innovus/ICC/QRC/Tempus/Voltus/RedHawk and so on).Experience with Cadence Innovus is a plus.

2. Successful tapeout experience is a strong plus.

3.Good Programming Skill(Perl/TCL) is a Plus.

4.Must be a good team player and a good communication skills.