Sr. Staff ASIC Design Engineer
50-90万/年成都市本科不限经验
职位描述
Synaptics is looking for a Sr. Staff ASIC Design Engineer to join our Chengdu Design Team.  This role requires strong expertise in ASIC/SoC design, ownership of audio-related IPs, and significant hands-on contributions to silicon debug, FPGA prototyping, and system integration. This role will work across functions to ensure high-quality deliverables and mentor junior engineers, while collaborating closely with architects and technical leads. This position reports to the Director, ASIC Design.
Responsibilities & Competencies
Job Duties
- Contribute to the architecture, micro-architecture, soc integration and RTL design of ASIC/SoC blocks and subsystems
- Own audio-related IPs, ensuring integration quality and long-term sustainment across product lines
- Support sustaining activities for silicon projects, including debug, enhancements, and customer issue resolution
- Develop and maintain integration of flash and low-speed peripherals
FPGA prototyping development and provide support for system bring-up and performance validation
- Collaborate with verification, physical design, firmware, and system teams to meet functional, performance, and power targets
- Drive debug and root-cause analysis for complex silicon and system-level issues
- Provide technical guidance and mentorship to junior engineers, contributing to team knowledge and best practices
- Participate in design reviews, documentation, and process improvements to ensure quality and efficiency
- Chip and IP level LINT/CDC check
- Chip and IP level timing analysis and closure, timing constraint/SDC development
- Low power design and power analysis
Competencies
- Strong digital design background with expertise in RTL (Verilog/SystemVerilog) and SoC integration
- Solid understanding of FPGA prototyping, debug, and lab bring-up
- Familiar with SOC architecture and bus protocol including ACE/AXI/AHB
- Basic scripting skills and familiar with TCL, Perl, etc.
- Ability to communicate complex, interactive design concepts clearly
- Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance
- Well organized with strong attention to detail; proactively ensures work is accurate
- Positive attitude and work ethic; unafraid to ask questions and explore new ideas
- Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology with a solid understanding of product architecture
- Analytical and able to make informed decisions based on experience
Sets clear expectations and objectives, and brings parties together to drive key initiatives
- Ability to work within a diverse team and mentor developing team members
- Excellent verbal and written communication skills; fluent in English
Qualifications (Requirements)
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field or equivalent
- 12+ years of ASIC/SoC design experience with increasing levels of technical ownership
- Proven track record delivering ASIC designs to production and supporting silicon sustainment
- Proficient with industry-standard design tools (Synopsys, Cadence, Mentor)
- Hands-on experience with synthesis, static timing analysis, Formal, Lint, CDC, DFT, and low-power techniques
- Experience with audio IPs, flash memory, and low-speed peripheral interfaces
- Experience with audio IPs, flash/peripherals, and FPGA prototyping
- Experience of SOC integration, low power design
- Familiarity with firmware/software interactions, system integration, and bring-up
- Experience of DFT/Physical tool and flow will be a plus
- Minimal travel up to 10%
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